TSMC's 2nm process N2 officially goes into mass production

In the fourth quarter of 2025, a milestone progress was made in the global semiconductor manufacturing industry - TSMC officially announced the start of mass production of its 2nm (N2) process chips. This news not only marks another leap forward for TSMC in advanced process technology, but also injects new vitality into the global semiconductor industry.

According to the "Top 10 Technology Trends in the Global Semiconductor Industry for 2026" recently released by AspenCore, the discussion of the 2nm process has been ongoing since IBM first announced the production of 2nm node GAAFET transistors in 2021. According to Illumi Huang, a senior industry analyst at AspenCore, during the period of 2021-2022, Intel, Samsung, and TSMC have successively announced their respective 2nm nodes, and it is basically clear that they will achieve mass production by 2025.

But currently, it seems that only TSMC has truly delivered on its promises.

TSMC clearly states on its official website's 2nm process page that "TSMC's 2nm (N2) process has started mass production as planned in the fourth quarter of 2025. ”This authoritative statement completely dispelled previous market speculation and doubts about the production time of N2 process. According to the "Logic Process" page on TSMC's official website, the development of the N2 process has been proceeding according to plan and has made good progress. The latest update date is December 16th, further confirming the substantial start of mass production.

▲ Route map 251216, solid line with 2nm circular box

▲ Route map 250722, with a 2nm circular box as a dashed line

GAA nanosheet transistors lead innovation

The N2 process is TSMC's first process node to adopt fully enclosed gate (GAA) nanosheet transistors, marking another technological innovation for TSMC in the semiconductor manufacturing field. The GAA structure completely wraps the channel formed by horizontally stacked nanosheets through the gate, greatly enhancing electrostatic control and reducing leakage current, thereby achieving smaller transistor sizes without sacrificing performance or energy efficiency. This innovation not only increases the density of transistors, but also lays a solid foundation for future performance improvement and power consumption reduction.

In addition, the N2 process also integrates ultra-high performance metal insulator metal (SHPMIM) capacitors in the power transmission network, with a capacitance density twice that of previous generation products, while reducing the chip resistance (Rs) and via resistance (Rc) by 50%. These improvements significantly enhance power stability, chip performance, and overall energy efficiency, making the N2 process the most advanced semiconductor technology in terms of density and energy efficiency in the industry.

According to data released by TSMC, compared to the N3E process, the N2 process has improved performance by 10% -15% at the same power consumption, reduced power consumption by 25% -30%, and increased transistor density by 15% (suitable for hybrid designs that include logic, analog, and SRAM). For pure logic circuit design, the increase in transistor density is as high as 20%. These significant performance improvements enable the N2 process to meet the needs of diverse fields ranging from smartphones to high-performance computing (HPC) and artificial intelligence (AI) applications.

Major customers adopt first, and production capacity steadily expands

Although the outsourcing price of N2 technology is expensive, with initial wafer outsourcing prices reportedly reaching $30000 per wafer, it still attracts the favor of many large manufacturers.

According to past practice, Apple is usually the first customer to adopt TSMC's new process technology, but this time AMD seized the opportunity with its sixth generation EPYC (Xiaolong) processor "Venice" and became the first customer to adopt TSMC's 2nm process technology.

In addition, NVIDIA、 Technology giants such as Qualcomm and MediaTek also plan to adopt N2 technology in their future products, further driving the market demand for N2 technology.

To meet the growing market demand, TSMC has started producing 2nm chips at its Fab 22 factory near Kaohsiung and plans to expand production capacity in the future. At the same time, 

TSMC will also mass produce N2 based chips in its new wafer fab, covering smartphones as well as larger AI and HPC chips. This measure not only demonstrates TSMC's confidence in 

advanced process technology, but also provides strong support for its leading position in the global semiconductor market.

Continuous innovation, leading the new trend of the semiconductor industry

Currently, in addition to TSMC, Samsung Electronics is also advancing its 2nm process, but has not yet announced a production date; Intel is facing challenges in its 2nm process, which is expected to reach mass production by 2026. Huang Yefeng stated that the 2nm nodes of several major wafer foundries will adopt GAAFET structure instead of FinFET - the so-called nanosheet current channels are horizontally arranged and surrounded by gates on all sides.

The three contract manufacturers have different names for GAAFET: Samsung calls it MBCFET, TSMC calls it GAAFET, and Intel's version is called RibbonFET. The specific implementation 

plans vary. ”Huang Yefeng said.

TSMC's leading position in advanced manufacturing processes has enabled it to maintain a competitive advantage in the high-end chip manufacturing market. According to market 

research institutions, in the third quarter of 2025, TSMC's market share in the global wafer foundry market reached 59.3%, with a market share of up to 80% for high-end processes 

(7nm and below).

Looking ahead, TSMC stated that it will continue to adhere to the strategy of continuous improvement and launch upgraded versions such as N2P and A16. Among them, N2P is planned 

to be mass-produced in the second half of 2026, with a performance improvement of 5% -10% and a power consumption reduction of 5% -10%; The A16 will be put into production in 

the second half of 2026, using Super Power Rail back power technology designed specifically for complex AI and HPC processors. The launch of these upgraded versions will further 

consolidate TSMC's leading position in advanced process technology and lead the global semiconductor industry towards a new stage of development.